Monero proposed a strategy of hard forking every 3-6 months to slightly change the CryptoNight hashing algorithm. The capital and time required to build an ASIC is significant, and with highly specific hardware designs, slight tweaks in a hashing algorithm should invalidate the chip design, wasting the time and capital investment of ASIC manufacturers. However, if changes made to the algorithm are insufficient to prevent ASICs being reprogrammed, then the network can become vulnerable to hashrate centralisation until another hard fork is possible.

University of Connecticut

An Application-Specific Integrated Circuit (ASIC) is a computer chip that is built specifically for a single function. For mining, ASICs are used to compute for specific hashing algorithms. They pose a risk to decentralisation because they are manufactured by specific companies and have very limited distribution channels due to the specialised nature of the hardware. To prevent ASIC miners from monopolising the network hashrate, many cryptocurrencies developed ASIC resistant hashing algorithms, like Scrypt and Ethash.

ASIC Resistance

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Loki Whitepaper

Until recently, Monero used the CryptoNight hashing algorithm, which requires large amounts of L3 cache to operate, theoretically making it harder to produce an ASIC chip. However, Bitmain released the X3, a CryptoNight specific ASIC that could effectively mine at ten times the speed of a graphics processing unit. Other hashing algorithms are now being mined by ASICs, including Scrypt, Ethash, and Equihash.

ASIC Resistance Problems

Monero's Solution to ASIC Resistance

A number of alternative proof-of-work algorithms have been proposed to combat the need to hard fork regularly, including provably memory-hard hashing algorithms like Argon2, Balloon hash, and polymorphic hashing algorithms like ProgPoW and RandProg.

Present Solutions to ASIC Resistance

Loki will incorporate a version of CryptoNight called CryptoNight Heavy, which maintains ASIC resistance against CryptoNight ASIC miners. However, it provides an increase in scratchpad size to 4mb, and a change in the way implodes and explodes are handled, providing more robust protection against ASIC development until a more permanent solution is proposed. 

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