The Peripheral Component Interconnect Express (PCIe) is a dedicated high-speed expansion bus that forms point-to-point connections between the CPU and critical components like GPUs, network interfaces, and storage. It offers massive bandwidth, such as up to $32$ GB/s on PCIe 4.0 in a $16$-lane slot, with single-digit microsecond latency (e.g., $5$ μs). However, PCIe links are a precious resource because processors only support a limited number of lanes. For instance, AMD's EPYC 3 has $128$ lanes, Intel's Xeon has up to $48$ lanes per chip, while desktop-grade CPUs like the Ryzen 9 and Core i9 have $20$ and $16$ lanes, respectively. Because GPUs typically require $16$ lanes each and must share the bus with other bandwidth-intensive peripherals, the number of GPUs that can connect to the CPU at full speed is inherently limited. To minimize packet overhead during transmission across these limited links, deep learning systems prefer large bulk data transfers.