In bandwidth-adaptive execution, how are the $m$ missing experts in set $M$ partitioned between the cache-fill set $F$ and the CPU-execution set $C$?

True or False: Bandwidth-adaptive execution throttles PCIe bus utilization below peak bandwidth to avoid saturating host memory channels during concurrent decode.

If a decode step encounters $m$ missing experts and assigns $q$ experts to the cache-fill set, what is the size of the CPU-execution set in terms of $m$ and $q$?

Explain how missing experts are handled in both the cache-fill set and the CPU-execution set during bandwidth-adaptive decode, and explain how this partitioning avoids GPU idle time while supporting future decode steps.

How does the execution of experts assigned to the CPU-execution set $C$ affect GPU cache residency?

True or False: Experts assigned to the cache-fill set $F$ are transferred to the GPU, evaluated, and then discarded from VRAM rather than retained.

From which specific memory do experts assigned to the CPU-execution set $C$ execute in place?

Analyze the bandwidth utilization strategy employed during bandwidth-adaptive miss partitioning. Specifically, discuss how the system balances PCIe bus utilization against residual host memory bandwidth during decode, and explain the architectural trade-offs of this concurrent approach compared to transferring all missing experts over the PCIe bus.

Residual Host Bandwidth Formulation for CPU Expert Execution