The microarchitecture of a CPU core defines its internal execution components. The front-end is responsible for loading instructions and using branch prediction to anticipate the control flow path. Assembly instructions are frequently decoded into lower-level microinstructions before being processed by the execution core. To maximize throughput, modern execution cores are highly parallel and capable of performing multiple operations simultaneously in a single clock cycle (e.g., up to $8$ simultaneous operations on the ARM Cortex A77), provided those operations can be carried out independently. Within the execution core, units specialize in different tasks; for instance, some are dedicated to integer operations while others are optimized for floating-point performance. Furthermore, to increase throughput, the processor might concurrently follow multiple code paths during a branching instruction and later discard the results of the unused branches. Because following incorrect paths wastes computational resources, branch prediction units on the front-end are critical for ensuring that only the most promising paths are pursued.